Approach
Alpha through rigour.
Our strategies are grounded in statistical inference and executed with hardware-level precision. No discretion. No narrative. Only quantifiable edge.
Statistical Arbitrage
We identify persistent co-integration relationships between instrument pairs — equities, ETFs, and derivatives — and exploit their temporary divergence from equilibrium. Position sizing is driven by live Kalman-filter estimates of the spread's mean and variance, keeping risk-adjusted exposure stable across changing volatility regimes.
Holding periods range from seconds to hours. Models are re-calibrated intraday using streaming tick data. Alpha decay is monitored continuously; positions that cease to demonstrate statistical edge are closed before scheduled exit.
Systematic Market Making
We post continuous two-sided quotes across equity and options markets, harvesting bid-ask spread while managing adverse selection risk. Quote placement is parametric: spread width, skew, and depth adapt dynamically to current inventory, estimated short-term volatility, and queue-position probabilities.
Our market-making engine processes exchange order-book updates with single-digit-microsecond latency. Quote cancellation and replacement logic is implemented in FPGA to guarantee sub-microsecond response to price changes that exceed our risk thresholds.
Low-Latency Execution
Execution is not an afterthought — it is a primary source of edge. Our order management system is written entirely in C++ and Rust, compiled with profile-guided optimisation, and run on kernel-bypassed network stacks (DPDK / RDMA). Co-location at Tier-1 exchange data centres minimises physical round-trip time. FPGA offload handles protocol parsing, checksum validation, and time-critical cancel/replace logic in hardware, decoupling those operations from the host CPU entirely.
Risk is the invariant we design around.
Every strategy operates within hard position limits, drawdown triggers, and correlated-exposure controls that are enforced at the execution layer — not in application code. Kill switches are hardware-gated. There is no scenario in which a software bug can prevent risk limits from triggering.